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74VHCT9273FT中文資料東芝數(shù)據(jù)手冊PDF規(guī)格書

74VHCT9273FT
廠商型號

74VHCT9273FT

功能描述

CMOS Digital Integrated Circuits Silicon Monolithic

文件大小

188.47 Kbytes

頁面數(shù)量

9

生產(chǎn)廠商 Toshiba Semiconductor
企業(yè)簡稱

TOSHIBA東芝

中文名稱

株式會社東芝官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-1 10:06:00

74VHCT9273FT規(guī)格書詳情

Functional Description

? Octal D-Type Flip-Flop with Clear

General

The 74VHCT9273FT is an advanced high speed CMOS OCTAL D-TYPE FLIP FLOP fabricated with silicon gate

C2MOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS

low power dissipation.

The input voltage are compatible with TTL output voltage.

This device may be used as a level converter for interfacing 3.3 V to 5 V system.

Information signals applied to D inputs are transferred to the Q outputs on the positive going edge of the clock

pulse.

When the CLR input is held L, the Q outputs are at a low logic level independent of the other inputs.

The CLR input and CK input have hysteresis between the positive-going and negative-going thresholds. Thus

the 74VHCT9273FT is capable of squaring up transitions of slowly changing input signals and provides an

improved noise immunity.

It is easy to wire on the board because Input terminals are at the opposite side of output terminals.

An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply

voltage.

Features

(1) AEC-Q100 (Rev. H) (Note 1)

(2) Wide operating temperature range: Topr = -40 to 125 

(3) High speed: fMAX = 185 MHz (typ.) at VCC = 5.0 V

(4) Low power dissipation: ICC = 2.0 μA (max) at Ta = 25

(5) Compatible with TTL inputs: VIL = 0.5 V (max)

VIH = 2.1 V (min)

(6) Power-down protection is provided on all inputs.

(7) Balanced propagation delays: tPLH ≈ tPHL

(8) Function compatible with 74VHC273.

(9) Input terminals are at the opposite side of output terminals

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N/A
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