EVAL-ADN4624EB1Z開(kāi)發(fā)板套件編程器的評(píng)估演示板及套件規(guī)格書(shū)PDF中文資料

EVAL-ADN4624EB1Z屬于開(kāi)發(fā)板套件編程器的評(píng)估演示板及套件。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的EVAL-ADN4624EB1Z評(píng)估和演示板及套件該系列產(chǎn)品提供了一種方便的方法，在經(jīng)過(guò)驗(yàn)證的實(shí)施環(huán)境中評(píng)估某些重點(diǎn)器件的性能或特性。評(píng)估方法通常有完善的文檔說(shuō)明，并且視乎具體情況由評(píng)估軟件提供支持。產(chǎn)品通常由印刷電路板組成，板上已裝有重點(diǎn)器件以及必要或有用的支持元器件，另外也可能包括其他組件，例如電纜或電源。對(duì)于數(shù)量特別多或類別獨(dú)特的器件類別(如 ADC、DAC 和開(kāi)關(guān)模式電源)，評(píng)估平臺(tái)可組合為一個(gè)單獨(dú)的產(chǎn)品系列。

GENERAL DESCRIPTION

The ADN46241 is a quad-channel, signal isolated, low voltage

differential signaling (LVDS) buffer that operates at up to 2.5 Gbps

with very low jitter. The device integrates Analog Devices, Inc.,

iCoupler? technology, enhanced for high speed operation to provide

drop-in galvanic isolation of LVDS signal chains. AC coupling

and/or level shifting to the LVDS receivers and from the LVDS

drivers allows isolation of other high speed signals such as current

mode logic (CML).

The ADN4624 includes a refresh mechanism to monitor the input

and output states and ensure they remain the same in the absence

of data transitions (for example, at power-on).

For lower power consumption and high speed operation with low

jitter, the LVDS and isolator circuits rely on 1.8 V supplies. The

ADN4624 is fully specified over a wide industrial temperature range

and is available in a 28-lead, wide-body, finer pitch SOIC_W_FP

package with 8.3 mm creepage and clearance (for 5.7 kV rms or 8

kVPEAK surge and impulse voltages and reinforced insulation at ac

mains voltages) or 6 mm × 6 mm LFCSP package with 1.27 mm

creepage and clearance (for basic/functional isolation).

FEATURES

? 5.7 kV rms and 1.5 kV rms LVDS isolators

? Complies with TIA/EIA-644-A LVDS signal levels

? Quad-channel configuration

? Any data rate up to 2.5 Gbps switching with low jitter

? 10 Gbps total bandwidth across four channels

? 2.15 ns typical propagation delay

? Typical jitter: 0.82 ps rms random, 40 ps total peak

? Lower power 1.8 V supplies

? ±8 kV IEC 61000-4-2 ESD protection across isolation barrier

? High common-mode transient immunity: 100 kV/μs typical

? Safety and regulatory approvals (28-lead SOIC_W_FP package)

? UL (pending): 5700 V rms for 1 minute per UL 1577

? CSA Component Acceptance Notice 5A (pending)

? VDE certificate of conformity (pending)

? DIN V VDE V 0884-11 (VDE V 0884-11):2017-01

? VIORM = 849 VPEAK (working voltage)

? Enable or disable refresh (low speed output correctness check)

? Operating temperature range: ?40°C to +125°C

? 28-lead, wide-body, finer pitch SOIC_W_FP package with 8.3

mm creepage and clearance or 6 mm × 6 mm LFCSP package

with 1.27 mm creepage and clearance

APPLICATIONS

? Isolated video and imaging data

? Analog front-end isolation

? Data plane isolation

? Isolated high speed clock and data links

? Multi-gigabit serialization/deserialization (SERDES)

? Board-to-board optical replacement (for example, short reach fiber)