HYB3165400J-50中文資料西門子數(shù)據(jù)手冊(cè)PDF規(guī)格書

16M x 4-Bit Dynamic RAM (4k & 8k Refresh)

This device is a 64 MBit dynamic RAM organized 16 777 216 by 4 bits. The device is fabricated in SIEMENS/IBM most advanced first generation 64Mbit CMOS silicon gate process technology. The circuit and process design allow this device to achieve high performance and low power dissipation. This DRAM operates with a single 3.3 +/-0.3V power supply and interfaces with either LVTTL or LVCMOS levels. Multiplexed address inputs permit the HYB 3164(5)400J/T to be packaged in a 500mil wide SOJ-34 or TSOP-34 plastic package. These packages provide high system bit densities and are compatible with commonly used automatic testing and insertion equipment.

Preliminary Information

? 16 777 216 words by 4-bit organization

? 0 to 70 ?C operating temperature

? Fast access and cycle time

RAS access time:

50 ns (-50 version)

60 ns (-60 version)

Cycle time:

90 ns (-50 version)

110 ns (-60 version)

CAS access time:

13 ns ( -50 version)

15 ns ( -60 version)

? Fast page mode cycle time

35 ns (-50 version)

40 ns (-60 version)

? Single + 3.3 V (± 0.3V) power supply

? Low power dissipation

max. 396 active mW ( HYB 3164400J/T-50)

max. 360 active mW ( HYB 3164400J/T-60)

max. 504 active mW ( HYB 3165400J/T-50)

max. 432 active mW ( HYB 3165400J/T-60)

7.2 mW standby (TTL)

720 W standby (MOS)

? Read, write, read-modify-write, CAS-before-RAS refresh (CBR),

RAS-only refresh, hidden refresh and self refresh modes

? Fast page mode capability

? 8192 refresh cycles/128 ms , 13 R/ 11C addresses (HYB 3164400J/T)

? 4096 refresh cycles/ 64 ms , 12 R/ 12C addresses (HYB 3165400J/T)

? Plastic Package:

P-SOJ-34-1 500 mil HYB 3164(5)400J

P-TSOPII-34-1 500 mil HYB 3164(5)400T