Dual 64-Bit Static Shift Register

The MC14517B dual 64–bit static shift register consists of two identical, independent, 64–bit registers. Each register has separate clock and write enable inputs, as well as outputs at bits 16, 32, 48, and 64. Data at the data input is entered by clocking, regardless of the state of the write

enable input. An output is disabled (open circuited) when the write enable input is high. During this time, data appearing at the data input as well as the 16–bit, 32–bit, and 48–bit taps may be entered into the device by application of a clock pulse. This feature permits the register to be loaded with 64 bits in 16 clock periods, and also permits bus logic to be used. This device is useful in time delay circuits, temporary memory storage circuits, and other serial shift register applications.

?Diode Protection on All Inputs

?Fully Static Operation

?Output Transitions Occur on the Rising Edge of the Clock Pulse

?Exceedingly Slow Input Transition Rates May Be Applied to the Clock Input

?3–State Output at 64th–Bit Allows Use in Bus Logic Applications

?Shift Registers of any Length may be Fully Loaded with 16 Clock Pulses

?Supply Voltage Range = 3.0 Vdc to 18 Vdc

?Capable of Driving Two Low–power TTL Loads or One Low–power Schottky TTL Load Over the Rated Temperature Range

MC14517BCP屬于集成電路（IC） > 移位寄存器。安森美半導(dǎo)體公司制造生產(chǎn)的MC14517BCP移位寄存器移位寄存器是低級(jí)邏輯器件，通常用于在串行和并行方式之間轉(zhuǎn)換數(shù)字邏輯信號(hào)形式的數(shù)據(jù)，或在數(shù)字字內(nèi)移動(dòng)數(shù)據(jù)位的位置。移位寄存器通常使用集成到一個(gè)設(shè)備中的一組觸發(fā)器來(lái)實(shí)現(xiàn)，常用于集成度更高的邏輯器件，但仍可用于 I/O 擴(kuò)展等應(yīng)用，在這些應(yīng)用中離散形式的函數(shù)可能會(huì)非常有用。