MC74HCT573ADWR2集成電路（IC）的鎖存器規(guī)格書PDF中文資料

MC74HCT573ADWR2屬于集成電路（IC）的鎖存器。由安森美半導(dǎo)體公司制造生產(chǎn)的MC74HCT573ADWR2鎖存器鎖存器是類似于觸發(fā)器的基本數(shù)字存儲設(shè)備，但是不同之處在于，在鎖存使能（或類似命名）信號處于有效邏輯狀態(tài)的任何時間，保持的邏輯狀態(tài)都可以改變?！巴该鳌辨i存器還允許設(shè)備輸出在鎖存使能信號有效時反映輸入的當(dāng)前狀態(tài)，而相反的是，狀態(tài)僅在保持狀態(tài)已固定時改變。

Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs

High?Performance Silicon?Gate CMOS

The MC74HCT573A is identical in pinout to the LS573. This device may be used as a level converter for interfacing TTL or NMOS outputs to High?Speed CMOS inputs.

These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When Latch Enable goes low, data meeting the setup and hold times becomes latched.

The Output Enable input does not affect the state of the latches, but when Output Enable is high, all device outputs are forced to the high?impedance state. Thus, data may be latched even when the outputs are not enabled.

The HCT573A is identical in function to the HCT373A but has the Data Inputs on the opposite side of the package from the outputs to facilitate PC board layout.

Features

? Output Drive Capability: 15 LSTTL Loads

? TTL/NMOS?Compatible Input Levels

? Outputs Directly Interface to CMOS, NMOS and TTL

? Operating Voltage Range: 4.5 to 5.5 V

? Low Input Current: 10 μA

? In Compliance with the Requirements Defined by JEDEC Standard No. 7 A

? Chip Complexity: 234 FETs or 58.5 Equivalent Gates

? Improved Propagation Delays

? 50 Lower Quiescent Power

? These Devices are Pb?Free and are RoHS Compliant