24AA128T-I/MNY集成電路（IC）的存儲(chǔ)器規(guī)格書(shū)PDF中文資料

24AA128T-I/MNY屬于集成電路（IC）的存儲(chǔ)器。由微芯科技股份有限公司制造生產(chǎn)的24AA128T-I/MNY存儲(chǔ)器存儲(chǔ)器是集成電路上用作數(shù)據(jù)存儲(chǔ)設(shè)備的半導(dǎo)體器件。這些器件分為非易失性或易失性兩種，格式包括 CBRAM、DRAM、EEPROM、EERAM、EPROM、閃存、FRAM、NVSRAM、PCM (PRAM)、PSRAM、RAM 和 SRAM。這些器件的存儲(chǔ)容量為 64 b 至 6 Tb 不等，接口有 I2C、MMC、并行、eMMC、串行、單線、SPI、UFS、Xccela 總線和 1-線。

Description:

The Microchip Technology Inc. 24AA128/24LC128/24FC128 (24XX128*) is a 16K x 8 (128 Kbit) Serial Electrically Erasable PROM (EEPROM), capable of operation across a broad voltage range (1.7V to 5.5V). It has been developed for advanced, low-power applications such as personal communications or data acquisition. This device also has a page write capability of up to 64 bytes of data. This device is capable of both random and sequential reads up to the 128K boundary. Functional address lines allow up to eight devices on the same bus, for up to 1 Mbit address space. This device is available in the standard 8-pin plastic DIP, SOIC (3.90 mm and 5.28 mm), TSSOP, MSOP, DFN, TDFN and Chip Scale packages.

Features:

? Single Supply with Operation down to 1.7V for

24AA128/24FC128 devices, 2.5V for 24LC128

Devices

? Low-Power CMOS Technology:

- Write current 3 mA, typical

- Standby current 100 nA, typical

? 2-Wire Serial Interface, I2C? Compatible

? Cascadable up to Eight Devices

? Schmitt Trigger Inputs for Noise Suppression

? Output Slope Control to Eliminate Ground Bounce

? 100 kHz and 400 kHz Clock Compatibility

? 1 MHz Clock for FC Versions

? Page Write Time 5 ms, typical

? Self-Timed Erase/Write Cycle

? 64-Byte Page Write Buffer

? Hardware Write-Protect

? ESD Protection >4000V

? More than 1 Million Erase/Write Cycles

? Data Retention > 200 years

? Factory Programming Available

? Packages include 8-lead PDIP, SOIC, TSSOP,

DFN, TDFN, MSOP, and Chip Scale Packages

? Pb-Free and RoHS Compliant

? Temperature Ranges:

- Industrial (I): -40°C to +85°C

- Automotive (E): -40°C to +125°C