28C64AF-20ISO中文資料微芯科技數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

DESCRIPTION

The Microchip Technology Inc. 28C64A is a CMOS 64K non volatile electrically Erasable PROM. The 28C64A is accessed like a static RAM for the read or write cycles with out the need of external components. During a “byte write”, the address and data are latched internally, freeing the micro processor address and data bus for other operations. Following the initiation of write cycle, the device will go to a busy state and automatically clear and write the latched data using an internal control timer. To determine when the write cycle is complete, the user has a choice of monitoring the Ready/Busy output or using Data polling. The Ready/Busy pin is an open drain output, which allows easy configuration in wired or systems. Alternatively, Data polling allows the user to read the location last written to when the write operation is complete. CMOS design and processing enables this part to be used in systems where reduced power consumption and reliability are required. A complete family of packages is offered to provide the utmost flexibility in applications.

FEATURES

? Fast Read Access Time—150 ns

? CMOS Technology for Low Power Dissipation

- 30 mA Active

- 100 μA Standby

? Fast Byte Write Time—200 μs or 1 ms

? Data Retention >200 years

? High Endurance - Minimum 100,000 Erase/Write Cycles

? Automatic Write Operation

- Internal Control Timer

- Auto-Clear Before Write Operation

- On-Chip Address and Data Latches

? Data Polling

? Ready/Busy

? Chip Clear Operation

? Enhanced Data Protection

- VCC Detector

- Pulse Filter

- Write Inhibit

? Electronic Signature for Device Identification

? 5-Volt-Only Operation

? Organized 8Kx8 JEDEC Standard Pinout

- 28-pin Dual-In-Line Package

- 32-pin PLCC Package

- 28-pin SOIC Package

? Available for Extended Temperature Ranges:

- Commercial: 0°C to +70°C

- Industrial: -40°C to +85°C