29F52集成電路（IC）的驅動器接收器收發(fā)器規(guī)格書PDF中文資料

General Description

The 29F52 and 29F53 are 8-bit registered transceivers. Two 8-bit back to back registers store data flowing in both directions between two bidirectional buses. Separate clock, clock enable and 3-STATE output enable signals are provided for each register. The A0–A7 output pins are guaranteed to sink 24 mA while the B0–B7 output pins are designed for 64 mA.

The 29F53 is an inverting option of the 29F52. Both transceivers are AMD Am2952/2953 functional equivalents.

Features

■ 8-bit registered transceivers

■ Separate clock, clock enable and 3-STATE output enable provided for each register

■ AMD Am2952/2953 functional equivalents

■ Both inverting and non-inverting options available

■ 24-Pin slimline package