3D7105K-5中文資料DATADELAY數(shù)據(jù)手冊(cè)PDF規(guī)格書
3D7105K-5規(guī)格書詳情
FUNCTIONAL DESCRIPTION
The 3D7105 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 0.75ns through 8.0ns. The input is reproduced at the outputs without inversion, shifted in time as per the user-specified dash number. The 3D7105 is TTL- and CMOScompatible, capable of driving ten 74LS-type loads, and features both rising- and falling-edge accuracy.
FEATURES
? All-silicon, low-power CMOS technology
? TTL/CMOS compatible inputs and outputs
? Vapor phase, IR and wave solderable
? Auto-insertable (DIP pkg.)
? Low ground bounce noise
? Leading- and trailing-edge accuracy
? Delay range: .75 through 80ns
? Delay tolerance: 5 or 1ns
? Temperature stability: ±3 typical (0C-70C)
? Vdd stability: ±1 typical (4.75V-5.25V)
? Minimum input pulse width: 30 of total delay
? 14-pin DIP and 16-pin SOIC available as drop-in replacements for hybrid delay lines
產(chǎn)品屬性
- 型號(hào)：
3D7105K-5
- 制造商：
DATADELAY
- 制造商全稱：
Data Delay Devices, Inc.
- 功能描述：
MONOLITHIC 5-TAP FIXED DELAY LINE(SERIES 3D7105)
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
DATADELAY |
23+ |
NA/ |
3738 |
原裝現(xiàn)貨,當(dāng)天可交貨,原型號(hào)開票 |
詢價(jià) | ||
23+ |
DIP14 |
20000 |
原廠原裝正品現(xiàn)貨 |
詢價(jià) | |||
DATADELAY |
116 |
原裝正品現(xiàn)貨庫(kù)存價(jià)優(yōu) |
詢價(jià) | ||||
NA |
1815+ |
DIP14 |
6528 |
只做原裝正品假一賠十為客戶做到零風(fēng)險(xiǎn)!! |
詢價(jià) | ||
Ametherm |
24+ |
SMD |
17900 |
NTC熱敏電阻 |
詢價(jià) | ||
24+ |
SOP |
5000 |
詢價(jià) | ||||
DataDelayDevices |
650 |
公司優(yōu)勢(shì)庫(kù)存 熱賣中!! |
詢價(jià) | ||||
24+ |
DIP14 |
35210 |
一級(jí)代理/全新現(xiàn)貨/假一罰百! |
詢價(jià) | |||
ANY |
新 |
42 |
全新原裝 貨期兩周 |
詢價(jià) | |||
NA |
23+ |
DIP14 |
6500 |
專注配單,只做原裝進(jìn)口現(xiàn)貨 |
詢價(jià) |
