54AC16620WD中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

Members of the Texas Instruments

Widebus Family

3-State Outputs Drive Bus Lines Directly

Flow-Through Architecture Optimizes

PCB Layout

Distributed VCC and GND Pin

Configurations Minimize High-Speed

Switching Noise

EPIC (Enhanced-Performance Implanted

CMOS) 1-μm Process

500-mA Typical Latch-Up Immunity at

125°C

Package Options Include Plastic 300-mil

Shrink Small-Outline (DL) Packages Using

25-mil Center-to-Center Pin Spacings and

380-mil Fine-Pitch Ceramic Flat (WD)

Packages Using 25-mil Center-to-Center

Pin Spacings

description

The ’AC16620 are inverting 16-bit transceivers

designed for asynchronous communication

between data buses. The control-function

implementation allows for maximum flexibility in

timing.

These devices can be used as two 8-bit

transceivers or one 16-bit transceiver. They allow

data transmission from the A bus to the B bus or

from the B bus to the A bus, depending on the logic

level at the complementary output-enable (OEAB

or OEBA) inputs. The output-enable inputs can be

used to disable the device so that the buses are

effectively isolated.

The dual-enable configuration gives the transceiver the capability to store data by simultaneously enabling

OEAB and OEBA. Each output reinforces its input in this transceiver configuration. Thus, when both control

inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, the bus lines

remain at their last states.

The 74AC16620 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and

functionality of standard small-outline packages in the same printed-circuit-board area.

The 54AC16620 is characterized for operation over the full military temperature range of –55°C to 125°C. The

74AC16620 is characterized for operation from –40°C to 85°C.