54HC138中文資料摩托羅拉數(shù)據(jù)手冊PDF規(guī)格書

3-to-8 Line Decoder

The MC74VHC138 is an advanced high speed CMOS 3–to–8 decoder fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.

? High Speed: tPD= 5.7ns (Typ) at VCC= 5V

? Low Power Dissipation: ICC= 4μA (Max) at TA= 25°C

? High Noise Immunity: VNIH= VNIL= 28 VCC

? Power Down Protection Provided on Inputs

? Balanced Propagation Delays

? Designed for 2V to 5.5V Operating Range

? Low Noise: VOLP= 0.8 V (Max)

? Pin and Function Compatible with Other Standard Logic Families

? Latchup Performance Exceeds 300mA

? ESD Performance: HBM > 2000V; Machine Model > 200V

? Chip Complexity: 122 FETs or 30.5 Equivalent Gates