5962-1820501VXC中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

1 Features

? Radiation performance:

– Radiation-hardness-assured up to

TID 100 krad(Si)

– SEL, SEB, and SEGR immune to

LET = 75 MeV-cm2/mg

– SET and SEFI characterized up to

LET = 75 MeV-cm2/mg

? Peak efficiency: 95.5 (VO = 1 V at 100 kHz)

? Integrated 22-mΩ and 17-mΩ MOSFETs

? Power rail: 3 V to 7 V on VIN

? Flexible switching frequency options:

– 100-kHz to 1-MHz adjustable internal oscillator

– External sync capability: 100-kHz to 1-MHz

– SYNC pins can be configured as 500-kHz

clocks at 90° out of phase to parallel up to

4 devices

? 0.6-V ±1.5 voltage reference over temperature,

radiation, and line and load regulation

? Monotonic start-up into prebiased outputs

? Adjustable slope compensation and soft-start

? Adjustable input enable and power-good output for

power sequencing

? Power-good output monitor for undervoltage and

overvoltage

? 34-pin, thermally-enhanced ceramic flatpack

package (HKY) for space applications

2 Applications

? Space satellite point of load supply

? Communications payload

? Optical imaging payload

3 Description

The TPS7H4001-SP is a radiation-hardness-assured,

7-V, 18-A synchronous buck converter with integrated

low-resistance high-side and low-side MOSFETs in a

thermally enhanced 34-pin ceramic flatpack package.

High efficiency and reduced component count are

achieved through current mode control.

The output voltage start-up ramp is controlled by the

SS/TR pin which allows operation as either a stand

alone power supply or in tracking situations. Power

sequencing is possible by correctly configuring the

enable and the power good pins. The TPS7H4001-SP

can be configured in primary-secondary mode and

with the SYNC2 pin, four devices can be configured in

parallel without an external clock.

Cycle-by-cycle current limiting on the high-side FET

protects the device in overload situations and is

enhanced by a low-side sourcing current protection

which prevents current runaway. There is also a lowside

sinking current protection which turns off the lowside

MOSFET to prevent excessive reverse current.

Thermal shutdown disables the part when die

temperature exceeds thermal limit.