5962R9572201VQC中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

廠商型號	5962R9572201VQC
功能描述	Radiation Hardened 16-Bit CMOS Microprocessor
文件大小	1.42573 Mbytes
頁面數(shù)量	30 頁
生產(chǎn)廠商	Renesas Technology Corp
企業(yè)簡稱	RENESAS【瑞薩】
中文名稱	瑞薩科技有限公司官網(wǎng)
原廠標識
數(shù)據(jù)手冊	下載地址一下載地址二到原廠下載
更新時間	2025-2-3 17:27:00

Features

?Electrically Screened to SMD # 5962-95722

?QML Qualified per MIL-PRF-38535 Requirements

?Radiation Performance

-Latch Up Free EPl-CMOS

-Total Dose. . . . . . . . . . . . . . . . . . . . .100 krad(Si) (Max)

-Transient Upset . . . . . . . . . . . . . . . . . . . .>108 rad(Si)/s

?Low Power Operation

-ICCSB. . . . . . . . . . . . . . . . . . . . . . . . . . . . .500?A (Max)

-ICCOP . . . . . . . . . . . . . . . . . . . . . . . 12mA/MHz (Max)

?Pin Compatible with NMOS 8086 and Intersil 80C86

?Completely Static Design DC to 5MHz

?1MB Direct Memory Addressing Capability

?24 Operand Addressing Modes

?Bit, Byte, Word, and Block Move Operations

?8-Bit and 16-Bit Signed/Unsigned Arithmetic

-Binary or Decimal

-Multiply and Divide

?Bus-Hold Circuitry Eliminates Pull-up Resistors for CMOS Designs

?Hardened Field, Self-Aligned, Junction-Isolated CMOS Process

?Single 5V Power Supply

?Military Temperature Range. . . . . . . . . . . -35oC to 125oC

?Minimum LET for

Single Event Upset . . . . . . . . . . . . .6MEV/mg/cm2 (Typ)