68HC08PT48中文資料恩智浦數(shù)據(jù)手冊PDF規(guī)格書

Features

Features of the MC68HC(9)08PT48 include:

? High-performance M68HC08 architecture

? Fully upward-compatible object code with M6805, M146805, and

M68HC05 Families

? On-chip FLASH/ROM of 48 Kbytes

? On-chip FLASH of 2 Kbytes separate from program ROM/FLASH

? ROM data security1 option (no security option for

MC68HC908PT48)

? Configuration register (CONFIG)

? 2.5 Kbytes of on-chip MCU random-access memory (RAM)

? 56 general-purpose input/output (I/O) pins

? Programmable phase locked loop (PLL) for bus clock generation

? Serial peripheral interface module (SPI)

? Serial communications interface module (SCI)

? Timebase module (TBM) with software selection of crystal clock

source

? Two external interrupt request pins

? ALERT generator module (ALR)

? 16-bit, 4-channel timer interface module (TIM)

? Computer operating properly (COP) reset

? 8-bit, 4-channel analog-to-digital converter (ADC)

? System protection features:

– Illegal opcode detect reset

– Illegal address detect reset

? Packaged in an 80-pin quad flat pack (LQFP)

? Low-power design (fully static with stop and wait modes)

? Master reset pin and power-on reset (POR)

Features of the CPU08 include:

? Enhanced HC05 programming model

? Extensive loop control functions

? 16 addressing modes (eight more than the HC05)

? 16-bit index register and stack pointer

? Fast 8 x 8 multiply instruction

? Fast 16 ? 8 divide instruction

? Binary coded decimal (BCD) instructions

? Optimization for controller applications

? High-level language (C language) support