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68HC705P6A中文資料飛思卡爾數(shù)據(jù)手冊PDF規(guī)格書

68HC705P6A
廠商型號

68HC705P6A

功能描述

General Release Specification

文件大小

3.2997 Mbytes

頁面數(shù)量

134

生產(chǎn)廠商 Freescale Semiconductor, Inc
企業(yè)簡稱

freescale飛思卡爾

中文名稱

飛思卡爾半導體官網(wǎng)

原廠標識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2024-11-17 23:32:00

68HC705P6A規(guī)格書詳情

Introduction

The Motorola MC68HC705P6A is an EPROM version of the MC68HC05P6 microcontroller. It is a low-cost combination of an M68HC05 Family microprocessor with a 4-channel, 8-bit analog-to-digital (A/D) converter, a 16-bit timer with output compare and input capture, a serial communications port (SIOP), and a computer operating properly (COP) watchdog timer. The HC05 CPU core contains 176 bytes of RAM, 4672 bytes of user EPROM, 239 bytes of bootloader ROM, and 21 input/output (I/O) pins (20 bidirectional, 1 input-only). This device is available in a 28-pin SOIC, PDIP, or windowed DIP package.

Features

? Low Cost

? HC05 Core

? 28-Pin SOIC, PDIP, or Windowed DIP Package

? 4672 Bytes of User EPROM (Including 48 Bytes of Page Zero EPROM and 16 Bytes of User Vectors)

? 239 Bytes of Bootloader ROM

? 176 Bytes of On-Chip RAM

? 4-Channel 8-Bit A/D Converter

? SIOP Serial Communications Port

? 16-Bit Timer with Output Compare and Input Capture

? 20 Bidirectional I/O Lines and 1 Input-Only line

? PC0 and PC1 High-Current Outputs

? Single-Chip, Bootloader, and Test Modes

? Power-Saving Stop, Halt, and Wait Modes

? Static EPROM Mask Option Register (MOR) Selectable Options:

– COP Watchdog Timer Enable or Disable

– Edge-Sensitive or Edge- and Level-Sensitive External Interrupt

– SIOP Most Significant Bit (MSB) or Least Significant Bit (LSB) First

– SIOP Clock Rates: OSC Divided by 8, 16, 32, or 64

– Stop Instruction Mode, STOP or HALT

– EPROM Security External Lockout

– Programmable Keyscan (Pullups/Interrupts) on PA0–PA7

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22+23+
CDIP
8000
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M
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2020+
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80000
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M
NA
608900
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M
24+
CDIP
5000
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FREESCALE
24+
PLCC52
4956
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M
22+
CDIP
25000
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N/A
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80000
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BGA
2800
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M
18+
NA
200
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