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72401L25PGB中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

72401L25PGB
廠商型號

72401L25PGB

功能描述

CMOS PARALLEL FIFO

文件大小

320.47 Kbytes

頁面數(shù)量

10

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2024-10-28 17:10:00

72401L25PGB規(guī)格書詳情

FEATURES:

? First-ln/First-Out Dual-Port memory

? 64 x 4 organization (IDT72401/72403)

? RAM-based FIFO with low falI-through time

? Low-power consumption

— Active: 175mW (typ.)

? Maximum shift rate — 45MHz

? High data output drive capability

? Asynchronous and simultaneous read and write

? Fully expandable by bit width

? Fully expandable by word depth

? IDT72403 have Output Enable pin to enable output data

? High-speed data communications applications

? High-performance CMOS technology

? Available in CERDIP, plastic DIP and SOIC

? Military product compliant to MlL-STD-883, Class B

? Standard Military Drawing #5962-86846 and

5962-89523 is listed on this function.

? Green parts available, see ordering information

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