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72825LB25PFG中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

72825LB25PFG
廠商型號

72825LB25PFG

功能描述

CMOS DUAL SyncFIFO?

文件大小

416.78 Kbytes

頁面數(shù)量

27

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-12 14:00:00

72825LB25PFG規(guī)格書詳情

FEATURES:

? The IDT72805LB is equivalent to two IDT72205LB 256 x 18 FIFOs

? The IDT72815LB is equivalent to two IDT72215LB 512 x 18 FIFOs

? The IDT72825LB is equivalent to two IDT72225LB 1,024 x 18 FIFOs

? The IDT72845LB is equivalent to two IDT72245LB 4,096 x 18 FIFOs

? Offers optimal combination of large capacity (8K), high speed,

design flexibility, and small footprint

? Ideal for the following applications:

- Network switching

- Two level prioritization of parallel data

- Bidirectional data transfer

- Bus-matching between 18-bit and 36-bit data paths

- Width expansion to 36-bit per package

- Depth expansion to 8,192 words per package

? 10ns read/write cycle time, 6.5ns access time

? IDT Standard or First Word Fall Through timing

? Single or double register-buffered Empty and Full Flags

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