74ABT16952DGG中文資料飛利浦數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The 74ABT16952 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.

The 74ABT16952 is a dual octal registered transceiver. Two 8-bit registers store data flowing in both directions between two bidirectional buses. Data applied to the inputs is entered and stored on the rising edge of the Clock (nCPXX) provided that the Clock Enable (nCEXX) is Low. The data is then present at the 3-State output buffers, but is only accessible when the Output Enable (nOEXX) is Low. Data flow from A inputs to B outputs is the same as for B inputs to A outputs.

Two options are available, 74ABT16952 which does not have the bus-hold feature and 74ABTH16952 which incorporates the bus-hold feature.

FEATURES

? Two 8-bit registered transceivers

? Live insertion/extraction permitted

? Power-up 3-State

? 74ABTH16952 incorporates bus-hold data inputs which eliminate

the need for external pull-up resistors to hold unused inputs

? Power-up reset

? Multiple VCC and GND pins minimize switching noise

? Independent registers for A and B buses

? Output capability: +64mA/–32mA

? Latch-up protection exceeds 500mA per Jedec Std 17

? ESD protection exceeds 2000V per MIL STD 883 Method 3015

and 200V per Machine Model

? Bus-hold data inputs eliminate the need for external pull-up

resistors to hold unused inputs