Members of the Texas Instruments

Widebus Family

3-State Outputs Drive Bus Lines or Buffer

Memory Address Registers

Flow-Through Architecture Optimizes PCB

Layout

Distributed VCC and GND Configuration

Minimizes High-Speed Switching Noise

EPIC (Enhanced-Performance Implanted

CMOS) 1-um Process

500-mA Typical Latch-Up Immunity at 125°C

Package Options Include Plastic Thin

Shrink Small-Outline (DGG) Package,

300-mil Shrink Small-Outline (DL) Package

Using 25-mil Center-to-Center Pin Spacings

and 380-mil Fine-Pitch Ceramic Flat (WD)

Package Using 25-mil Center-to-Center Pin

Spacings

description

The ’AC16245 are 16-bit bus transceivers

organized as dual-octal noninverting 3-state

transceivers designed for asynchronous two-way

communication between data buses. The control

function implementation minimizes external timing requirements

These devices allow data transmission from the A

bus to the B bus or from the B bus to the A bus,

depending upon the logic level at the direction

control (DIR) input. The output-enable input (OE)

can be used to disable the devices so that the

buses are effectively isolated.

The 74AC16245 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and

functionality of standard small-outline packages in the same printed-circuit-board area.

The 54AC16245 is characterized for operation over the full military temperature range of –55°C to 125°C. The

74AC16245 is characterized for operation from –40°C to 85°C.

74AC16245屬于集成電路（IC） > 緩沖器，驅(qū)動器，接收器，收發(fā)器。美國德州儀器公司制造生產(chǎn)的74AC16245緩沖器，驅(qū)動器，接收器，收發(fā)器邏輯緩沖器、驅(qū)動器、接收器和收發(fā)器允許隔離對某個電路的邏輯信號的訪問，以用于另一電路。緩沖器將其輸入信號（不變或反相）傳遞到其輸出，并可能用于清除弱信號或驅(qū)動負載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進行隔離通信。