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74ALVT16841DGG中文資料飛利浦?jǐn)?shù)據(jù)手冊PDF規(guī)格書
74ALVT16841DGG規(guī)格書詳情
DESCRIPTION
The 74ALVT16841 Bus interface latch is designed to provide extra data width for wider data/address paths of buses carrying parity. It is designed for VCC operation at 2.5V or 3.3V with I/O compatibility to 5V.
FEATURES
? High speed parallel latches
? 5V I/O Compatible
? Live insertion/extraction permitted
? Extra data width for wide address/data paths or buses carrying parity
? Power-up 3-State
? Power-up reset
? Ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors
? Output capability: +64mA/–32mA
? Latch-up protection exceeds 500mA per Jedec Std 17
? Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
? ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
PHILIPS/飛利浦 |
23+ |
NA/ |
4075 |
原裝現(xiàn)貨,當(dāng)天可交貨,原型號(hào)開票 |
詢價(jià) | ||
TI |
2016+ |
TSSOP48 |
9000 |
只做原裝,假一罰十,公司可開17%增值稅發(fā)票! |
詢價(jià) | ||
TI |
2016+ |
TSSOP48 |
6523 |
只做進(jìn)口原裝現(xiàn)貨!假一賠十! |
詢價(jià) | ||
PHI |
SSOP56 |
68500 |
一級代理 原裝正品假一罰十價(jià)格優(yōu)勢長期供貨 |
詢價(jià) | |||
PHILIPS |
24+ |
TSOP56 |
2987 |
只售原裝自家現(xiàn)貨!誠信經(jīng)營!歡迎來電! |
詢價(jià) | ||
PHILIPS |
25+ |
TSOP56 |
4200 |
⊙⊙新加坡大量現(xiàn)貨庫存,深圳常備現(xiàn)貨!歡迎查詢!⊙ |
詢價(jià) | ||
TI |
24+ |
TSSOP48 |
35200 |
一級代理/放心采購 |
詢價(jià) | ||
PHILIPS/飛利浦 |
22+ |
TSSOP |
8000 |
原裝正品支持實(shí)單 |
詢價(jià) | ||
PHILIPS |
23+ |
TSSOP |
12300 |
詢價(jià) | |||
TI |
TSSOP48 |
608900 |
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨! |
詢價(jià) |