74AUP1G157GM-Q100集成電路（IC）的信號開關多路復用器解碼器規(guī)格書PDF中文資料

廠商型號	74AUP1G157GM-Q100
參數(shù)屬性	74AUP1G157GM-Q100 封裝/外殼為6-XFDFN；包裝為卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶；類別為集成電路（IC）的信號開關多路復用器解碼器；產(chǎn)品描述：IC MULTIPLX 1 X 2:1 6XSON/SOT886
功能描述	Low-power 2-input multiplexer
絲印標識	aP
封裝外殼	XSON6 / 6-XFDFN
文件大小	219.38 Kbytes
頁面數(shù)量	13 頁
生產(chǎn)廠商	Nexperia B.V. All rights reserved
企業(yè)簡稱	NEXPERIA【安世】
中文名稱	安世半導體(中國)有限公司官網(wǎng)
原廠標識
數(shù)據(jù)手冊	下載地址一下載地址二到原廠下載
更新時間	2025-2-1 18:26:00

1. General description

The 74AUP1G157-Q100 is a single 2-input multiplexer. Schmitt trigger action at all inputs makes

the circuit tolerant to slower input rise and fall times. This device ensures a very low static and

dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully

specified for partial power-down applications using IOFF. The IOFF circuitry disables the output,

preventing the damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

? Automotive product qualification in accordance with AEC-Q100 (Grade 1)

? Specified from -40 °C to +85 °C and from -40 °C to +125 °C

? Wide supply voltage range from 0.8 V to 3.6 V

? CMOS low power dissipation

? High noise immunity

? Overvoltage tolerant inputs to 3.6 V

? Low noise overshoot and undershoot < 10 of VCC

? IOFF circuitry provides partial Power-down mode operation

? Low static power consumption; ICC = 0.9 μA (maximum)

? Latch-up performance exceeds 100 mA per JESD 78 Class II

? Complies with JEDEC standards:

? JESD8-12 (0.8 V to 1.3 V)

? JESD8-11 (0.9 V to 1.65 V)

? JESD8-7 (1.65 V to 1.95 V)

? JESD8-5 (2.3 V to 2.7 V)

? JESD8C (2.7 V to 3.6 V)

? ESD protection:

? MIL-STD-883, method 3015 Class 3A. Exceeds 5000 V

? HBM JESD22-A114F Class 3A. Exceeds 5000 V

? MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)