1. General description

The 74AUP1G18 is a 1-to-2 demultiplexer with a 3-state outputs. The device buffers the data on

input A and passes it to output 1Y or 2Y, depending on whether the state of the select input (S) is

LOW or HIGH. The unused output assumes the high impedence OFF-state. Schmitt-trigger action

at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very

low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This

device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables

the output, preventing the potentially damaging backflow current through the device when it is

powered down.

2. Features and benefits

? Wide supply voltage range from 0.8 V to 3.6 V

? CMOS low power dissipation

? High noise immunity

? Complies with JEDEC standards:

? JESD8-12 (0.8 V to 1.3 V)

? JESD8-11 (0.9 V to 1.65 V)

? JESD8-7 (1.2 V to 1.95 V)

? JESD8-5 (1.8 V to 2.7 V)

? JESD8C (2.7 V to 3.6 V)

? ESD protection:

? HBM JESD22-A114F Class 3A exceeds 5000 V

? MM JESD22-A115-A exceeds 200 V

? CDM JESD22-C101E exceeds 1000 V

? Low static power consumption; ICC = 0.9 μA (maximum)

? Latch-up performance exceeds 100 mA per JESD 78 Class II

? Overvoltage tolerant inputs to 3.6 V

? Low noise overshoot and undershoot < 10 of VCC

? IOFF circuitry provides partial Power-down mode operation

? Multiple package options

? Specified from -40 °C to +85 °C and -40 °C to +125 °C

74AUP1G18GN屬于集成電路（IC） > 信號(hào)開關(guān)，多路復(fù)用器，解碼器。安世半導(dǎo)體(中國)有限公司制造生產(chǎn)的74AUP1G18GN信號(hào)開關(guān)，多路復(fù)用器，解碼器邏輯型信號(hào)開關(guān)、多路復(fù)用器和編碼器 IC 可用于對(duì)以數(shù)字格式表示數(shù)據(jù)的電信號(hào)進(jìn)行路由和選擇。這些器件與設(shè)計(jì)用于模擬信號(hào)的類似產(chǎn)品有所不同，它們保留的信息表示為兩個(gè)電狀態(tài)之一，而不是兩個(gè)外部界限內(nèi)的無窮變化量。