74AUP1G58GS集成電路（IC）的門反相器-多功能可配置規(guī)格書PDF中文資料

廠商型號	74AUP1G58GS
參數屬性	74AUP1G58GS 封裝/外殼為6-XFDFN；包裝為卷帶（TR）；類別為集成電路（IC）的門反相器-多功能可配置；產品描述：IC CONFIG MULTI-FUNC GATE 6XSON
功能描述	Low-power configurable multiple function gate
絲印標識	aK
封裝外殼	SOT1202 / 6-XFDFN
文件大小	290.43 Kbytes
頁面數量	20 頁
生產廠商	Nexperia B.V. All rights reserved
企業(yè)簡稱	NEXPERIA【安世】
中文名稱	安世半導體(中國)有限公司官網
原廠標識
數據手冊	下載地址一下載地址二到原廠下載
更新時間	2025-5-24 23:00:00
人工找貨	74AUP1G58GS價格和庫存，歡迎聯(lián)系客服免費人工找貨

1. General description

The 74AUP1G58 is a configurable multiple function gate with Schmitt-trigger inputs. The device

can be configured as any of the following logic functions AND, OR, NAND, NOR, XOR, inverter

and buffer; using the 3-bit input. All inputs can be connected directly to VCC or GND. This device

ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to

3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry

disables the output, preventing the potentially damaging backflow current through the device when

it is powered down.

2. Features and benefits

? Wide supply voltage range from 0.8 V to 3.6 V

? CMOS low power dissipation

? High noise immunity

? Low static power consumption; ICC = 0.9 μA (maximum)

? Latch-up performance exceeds 100 mA per JESD 78 Class II

? Overvoltage tolerant inputs to 3.6 V

? Low noise overshoot and undershoot < 10 of VCC

? IOFF circuitry provides partial power-down mode operation

? Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

? ESD protection:

? HBM JESD22-A114F exceeds 5000 V

? MM JESD22-A115-A exceeds 200 V

? CDM JESD22-C101E exceeds 1000 V

? Multiple package options

? Specified from -40 °C to +85 °C and -40 °C to +125 °C