74AUP1T50GX集成電路（IC）的緩沖器驅動器接收器收發(fā)器規(guī)格書PDF中文資料

廠商型號	74AUP1T50GX
參數(shù)屬性	74AUP1T50GX 封裝/外殼為4-XFDFN 裸露焊盤；包裝為卷帶（TR）卷帶（TR）；類別為集成電路（IC）的緩沖器驅動器接收器收發(fā)器；產(chǎn)品描述：IC BUF NON-INVERT 3.6V 5X2SON
功能描述	Low-power buffer with voltage-level translator
絲印標識	5E
封裝外殼	SOT1226-3 / 4-XFDFN 裸露焊盤
文件大小	236.33 Kbytes
頁面數(shù)量	14 頁
生產(chǎn)廠商	Nexperia B.V. All rights reserved
企業(yè)簡稱	NEXPERIA【安世】
中文名稱	安世半導體(中國)有限公司官網(wǎng)
原廠標識
數(shù)據(jù)手冊	下載地址一下載地址二到原廠下載
更新時間	2025-2-11 11:43:00

1. General description

The 74AUP1T50 provides the single buffer function. This device ensures a very low static and

dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V.

The 74AUP1T50 is designed for logic-level translation applications with input switching levels that

accept 1.8 V low-voltage CMOS signals, while operating from either a single 2.5 V or 3.3 V supply

voltage.

The wide supply voltage range ensures normal operation as battery voltage drops from 3.6 V to

2.3 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry

disables the output, preventing the damaging backflow current through the device when it is

powered down.

Schmitt trigger inputs make the circuit tolerant to slower input rise and fall times across the entire

VCC range.

2. Features and benefits

? Wide supply voltage range from 2.3 V to 3.6 V

? High noise immunity

? ESD protection:

? HBM JESD22-A114F Class 3A exceeds 5000 V

? CDM JESD22-C101E exceeds 1000 V

? Low static power consumption; ICC = 1.5 μA (maximum)

? Latch-up performance exceeds 100 mA per JESD 78 Class II

? Inputs accept voltages up to 3.6 V

? Low noise overshoot and undershoot < 10 of VCC

? IOFF circuitry provides partial power-down mode operation

? Specified from -40 °C to +85 °C and -40 °C to +125 °C