74AUP2G57-Q100中文資料安世數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

1. General description

The 74AUP2G57-Q100 is a dual configurable multiple function gate with Schmitt-trigger inputs.

Each gate within the device can be configured as any of the following logic functions AND, OR,

NAND, NOR, XNOR, inverter and buffer; using the 3-bit input. All inputs can be connected directly

to VCC or GND.

This device ensures very low static and dynamic power consumption across the entire VCC range

from 0.8 V to 3.6 V.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry

disables the output, preventing the potentially damaging backflow current through the device when

it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

? Automotive product qualification in accordance with AEC-Q100 (Grade 1)

? Specified from -40 °C to +85 °C and from -40 °C to +125 °C

? Wide supply voltage range from 0.8 V to 3.6 V

? High noise immunity

? ESD protection:

? HBM JESD22-A114F exceeds 5000 V

? MM JESD22-A115-A exceeds 200 V

? CDM JESD22-C101E exceeds 1000 V

? Low static power consumption; ICC = 0.9 μA (maximum)

? Latch-up performance exceeds 100 mA per JESD 78 Class II

? Inputs accept voltages up to 3.6 V

? Low noise overshoot and undershoot < 10 of VCC

? IOFF circuitry provides partial power-down mode operation