74AVCH16244DGG集成電路（IC）的緩沖器驅(qū)動(dòng)器接收器收發(fā)器規(guī)格書PDF中文資料

1 General description

The 74AVCH16244 is a 16-bit non-inverting buffer/line driver with 3-state outputs. The

device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The 3?state

outputs are controlled by the output enable inputs nOE. A HIGH on nOE causes the

outputs to assume a high impedance OFF-state.

The 74AVCH16244 is designed to have an extremely fast propagation delay and a

minimum amount of power consumption.

To ensure the high-impedance output state during power-up or power-down, nOE should

be tied to VCC through a pull-up resistor (Live Insertion).

A dynamic controlled output (DCO) circuitry is implemented to support termination line

drive during transient (see Figure 4).

The 74AVCH16244 has active bus-hold circuitry to hold unused or floating data inputs

at a valid logic level. This feature eliminates the need for external pull-up or pull-down

resistors.

2 Features and benefits

? Wide supply voltage range from 1.2 V to 3.6 V

? CMOS low power consumption

? Low inductance multiple VCC and GND pins for minimum noise and ground bounce

? Input/output tolerant up to 3.6 V

? Dynamic controlled output (DCO) circuit dynamically changes the output impedance,

resulting in noise reduction without speed degradation

? Bus hold on all data inputs

? Supports Live Insertion

? Complies with JEDEC standards:

– JESD8-7 (1.2 V to 1.95 V)

– JESD8-5 (1.8 V to 2.7 V)

– JESD8-1A (2.7 V to 3.6 V)