74AVCH16245DGG集成電路（IC）的緩沖器驅(qū)動器接收器收發(fā)器規(guī)格書PDF中文資料

1. General description

The 74AVCH16245 is a 16-bit transceiver featuring non-inverting 3-state bus compatible

outputs in both send and receive directions. The device features two output enable inputs

(nOE) for easy cascading and two send/receive inputs (nDIR) for direction control.

Inputs nOE control the outputs so that the buses are effectively isolated. This device can

be used as two 8-bit transceivers or one 16-bit transceiver.

The 74AVCH16245 is designed to have an extremely fast propagation delay and a

minimum amount of power consumption.

To ensure the high-impedance output state during power-up or power-down, tie pins nOE

to VCC through a pull-up resistor (Live Insertion).

A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line

drive during transient (see Figure 4 and Figure 5)

The 74AVCH16245 has active bus-hold circuitry to hold unused or floating data inputs at a

valid logic level. This feature eliminates the need for external pull-up or pull-down

resistors.

2. Features and benefits

? Wide supply voltage range from 1.2 V to 3.6 V

? Complies with JEDEC standards:

? JESD8-7 (1.2 V to 1.95 V)

? JESD8-5 (1.8 V to 2.7 V)

? JESD8-1A (2.7 V to 3.6 V)

? CMOS low power consumption

? Input/output tolerant up to 3.6 V

? Dynamic Controlled Output (DCO) circuit dynamically changes output impedance,

resulting in noise reduction without speed degradation

? Low inductance multiple VCC and GND pins to minimize noise and ground bounce

? Supports Live Insertion

? All inputs have bus-hold