74F114SC中文資料仙童半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書
74F114SC規(guī)格書詳情
General Description
The 74F114 contains two high-speed JK flip-flops with common Clock and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Trig gering occurs at a voltage level of the clock and is not directly related to the transition time. The J and K inputs can change when the clock is in either state without affect ing the flip-flop, provided that they are in the desired state during the recommended setup and hold times relative to the falling edge of the clock. A LOW signal on SD or CD prevents clocking and forces Q or Q HIGH, respectively.
Simultaneous LOW signals on SD and CD force both Q and Q HIGH.
Asynchronous Inputs:
LOW input to SD sets Q to HIGH level
LOW input to CD sets Q to LOW level
Clear and Set are independent of Clock
Simultaneous LOW on CD and SD
makes both Q and Q HIGH
產(chǎn)品屬性
- 型號：
74F114SC
- 功能描述：
觸發(fā)器 Dual J-K Flip-Flop
- RoHS：
否
- 制造商：
Texas Instruments
- 電路數(shù)量：
2
- 邏輯系列：
SN74
- 邏輯類型：
D-Type Flip-Flop
- 極性：
Inverting, Non-Inverting
- 輸入類型：
CMOS
- 傳播延遲時間：
4.4 ns
- 高電平輸出電流：
- 16 mA
- 低電平輸出電流：
16 mA
- 電源電壓-最大：
5.5 V
- 最大工作溫度：
+ 85 C
- 安裝風(fēng)格：
SMD/SMT
- 封裝/箱體：
X2SON-8
- 封裝：
Reel
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
FAIRCHILD/仙童 |
23+ |
SOP-5.2 |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價 | ||
PHI |
23+ |
SOP3.9 |
12300 |
詢價 | |||
FAIRCHILD/仙童 |
23+ |
SOP-5.2 |
3000 |
一級代理原廠VIP渠道,專注軍工、汽車、醫(yī)療、工業(yè)、 |
詢價 | ||
FAIRCHILD/仙童 |
CDIP14 |
125000 |
一級代理原裝正品,價格優(yōu)勢,長期供應(yīng)! |
詢價 | |||
TI |
2023+ |
SOP14-39 |
8700 |
原裝現(xiàn)貨 |
詢價 | ||
S |
24+ |
SOP14 3 |
80000 |
只做自己庫存,全新原裝進口正品假一賠百,可開13%增 |
詢價 | ||
PHILIPS |
05+ |
原廠原裝 |
2041 |
只做全新原裝真實現(xiàn)貨供應(yīng) |
詢價 | ||
FSC/ON |
23+ |
原包裝原封 □□ |
3698 |
原裝進口特價供應(yīng) QQ 1304306553 更多詳細咨詢 庫存 |
詢價 | ||
MOT |
23+ |
SOP |
163 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價 | ||
NSC |
24+/25+ |
500 |
原裝正品現(xiàn)貨庫存價優(yōu) |
詢價 |
