74F114SC中文資料仙童半導體數(shù)據(jù)手冊PDF規(guī)格書
74F114SC規(guī)格書詳情
General Description
The 74F114 contains two high-speed JK flip-flops with common Clock and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Trig gering occurs at a voltage level of the clock and is not directly related to the transition time. The J and K inputs can change when the clock is in either state without affect ing the flip-flop, provided that they are in the desired state during the recommended setup and hold times relative to the falling edge of the clock. A LOW signal on SD or CD prevents clocking and forces Q or Q HIGH, respectively.
Simultaneous LOW signals on SD and CD force both Q and Q HIGH.
Asynchronous Inputs:
LOW input to SD sets Q to HIGH level
LOW input to CD sets Q to LOW level
Clear and Set are independent of Clock
Simultaneous LOW on CD and SD
makes both Q and Q HIGH
產(chǎn)品屬性
- 型號：
74F114SC
- 功能描述：
觸發(fā)器 Dual J-K Flip-Flop
- RoHS：
否
- 制造商：
Texas Instruments
- 電路數(shù)量：
2
- 邏輯系列：
SN74
- 邏輯類型：
D-Type Flip-Flop
- 極性：
Inverting, Non-Inverting
- 輸入類型：
CMOS
- 傳播延遲時間：
4.4 ns
- 高電平輸出電流：
- 16 mA
- 低電平輸出電流：
16 mA
- 電源電壓-最大：
5.5 V
- 最大工作溫度：
+ 85 C
- 安裝風格：
SMD/SMT
- 封裝/箱體：
X2SON-8
- 封裝：
Reel
| 供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
onsemi(安森美) |
23+ |
SOIC14 |
6000 |
誠信服務，絕對原裝原盤 |
詢價 | ||
PHI |
23+ |
SOP3.9 |
12300 |
詢價 | |||
SIGN |
23+ |
NA |
9856 |
原裝正品,假一罰百! |
詢價 | ||
TI |
1815+ |
SOP14-3.9 |
6528 |
只做原裝正品現(xiàn)貨!或訂貨,假一賠十! |
詢價 | ||
FSC |
SOP-5.2 |
608900 |
原包原標簽100%進口原裝常備現(xiàn)貨! |
詢價 | |||
MOT |
9311/ |
SOP |
163 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價 | ||
FSC |
23+ |
SOP |
3200 |
全新原裝、誠信經(jīng)營、公司現(xiàn)貨銷售 |
詢價 | ||
S |
QQ咨詢 |
CDIP |
846 |
全新原裝 研究所指定供貨商 |
詢價 | ||
PHI |
24+ |
SOP |
55 |
詢價 | |||
FAIRCHILD |
新 |
4 |
全新原裝 貨期兩周 |
詢價 |
