74HC138S16-13集成電路（IC）的信號開關多路復用器解碼器規(guī)格書PDF中文資料

Description

The 74HC138 is a high speed CMOS device.

The device accepts a three bit binary weighted address on input pins A0, A1 and A2 and when enabled will produce one active low output with the remaing seven being high.

There are two active LOW enable inputs E1 and E2, and one active HIGH enable input E3. The disabled device state results in all outputs being high. The enable state occurs with E1 and E2 asserted low and E3 asserted high.

The multiple enable lines allow for the parallel expansion of decoders to create 4-to-16 line versions with no additional parts and 5-to-32 versions with the addition of a single inverter.

Features

? Wide Supply Voltage Range from 2.0V to 6.0V

? Sinks or sources 8 mA at VCC = 4.5V

? CMOS low power consumption

? Schmitt Trigger Action at All Inputs

? Inputs Accept up to 6.0V

? ESD Protection Tested per JESD 22

? Exceeds 200-V Machine Model (A115-A)

? Exceeds 2000-V Human Body Model (A114-A)

? Exceeds 1000-V Charged Device Model (C101C)

? Latch-Up Exceeds 100mA per JESD 78D, Class II

? Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)

? Halogen and Antimony Free. “Green” Device (Note 3)

Applications

? Memory chip select decoding

? Demultiplexing

? Single line peripheral control

? Allow simple serial bit streams from a microcontroller to control as many peripheral lines as needed