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74HC393PW集成電路（IC）的計數(shù)器除法器規(guī)格書PDF中文資料

廠商型號	74HC393PW
參數(shù)屬性	74HC393PW 封裝/外殼為14-TSSOP（0.173"，4.40mm 寬）；包裝為管件；類別為集成電路（IC）的計數(shù)器除法器；產(chǎn)品描述：IC DUAL 4BIT BINRY COUNT 14TSSOP
功能描述	Dual 4-bit binary ripple counter
封裝外殼	14-TSSOP（0.173"，4.40mm 寬）
文件大小	268.23 Kbytes
頁面數(shù)量	15 頁
生產(chǎn)廠商	Nexperia B.V. All rights reserved
企業(yè)簡稱	NEXPERIA【安世】
中文名稱	安世半導體(中國)有限公司官網(wǎng)
原廠標識
數(shù)據(jù)手冊	下載地址一下載地址二到原廠下載
更新時間	2025-1-19 20:00:00

1. General description

The 74HC393; 74HCT393 is a dual 4-stage binary ripple counter. Each counter features a clock

input (nCP), an overriding asynchronous master reset input (nMR) and 4 buffered parallel outputs

(nQ0 to nQ3). The counter advances on the HIGH-to-LOW transition of nCP. A HIGH on nMR

clears the counter stages and forces the outputs LOW, independent of the state of nCP. Inputs

include clamp diodes. This enables the use of current limiting resistors to interface inputs to

voltages in excess of VCC.

2. Features and benefits

? Wide supply voltage range from 2.0 V to 6.0 V

? CMOS low power dissipation

? High noise immunity

? Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

? Complies with JEDEC standards:

? JESD8C (2.7 V to 3.6 V)

? JESD7A (2.0 V to 6.0 V)

? Input levels:

? For 74HC393: CMOS level

? For 74HCT393: TTL level

? ESD protection:

? HBM JESD22-A114F exceeds 2000 V

? MM JESD22-A115-A exceeds 200 V.

? Two 4-bit binary counters with individual clocks

? Divide by any binary module up to 28 in one package

? Two master resets to clear each 4-bit counter individually