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74HC4053BQ-Q100中文資料恩智浦?jǐn)?shù)據(jù)手冊PDF規(guī)格書

74HC4053BQ-Q100
廠商型號(hào)

74HC4053BQ-Q100

功能描述

Triple 2-channel analog multiplexer/demultiplexer

文件大小

320.63 Kbytes

頁面數(shù)量

30

生產(chǎn)廠商 NXP Semiconductors
企業(yè)簡稱

nxp恩智浦

中文名稱

恩智浦半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-29 23:00:00

74HC4053BQ-Q100規(guī)格書詳情

General description

The 74HC4053-Q100; 74HCT4053-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A.

Features and benefits

■ Automotive product qualification in accordance with AEC-Q100 (Grade 1)

◆ Specified from -40 °C to +85 °C and from -40 °C to +125 °C

■ Wide analog input voltage range from -5 V to +5 V

■ Low ON resistance:

◆ 80 Ω (typical) at VCC - VEE = 4.5 V

◆ 70 Ω (typical) at VCC - VEE = 6.0 V

◆ 60 Ω (typical) at VCC - VEE = 9.0 V

■ Logic level translation: to enable 5 V logic to communicate with ?5 V analog signals

■ Typical ‘break before make’ built-in

■ ESD protection:

◆ MIL-STD-883, method 3015 exceeds 2000 V

◆ HBM JESD22-A114F exceeds 2000 V

◆ MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

◆ CDM AEC-Q100-011 revision B exceeds 1000 V

■ Multiple package options

Applications

■ Analog multiplexing and demultiplexing

■ Digital multiplexing and demultiplexing

■ Signal gating

產(chǎn)品屬性

  • 型號(hào):

    74HC4053BQ-Q100

  • 制造商:

    NXP Semiconductors

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫存 備注 價(jià)格
NXP(恩智浦)
23+
N/A
1183
原裝正品,現(xiàn)貨庫存,1小時(shí)內(nèi)發(fā)貨
詢價(jià)
TI
23+
DIP
20000
全新原裝假一賠十
詢價(jià)
NXP
23+
SOP-16
12300
詢價(jià)
NXP(恩智浦)
23+
N/A
11975
正規(guī)渠道,免費(fèi)送樣。支持賬期,BOM一站式配齊
詢價(jià)
NXP
SOP3.9
2500
原裝長期供貨!
詢價(jià)
NXP
24+
N/A
9000
只做原裝正品 有掛有貨 假一賠十
詢價(jià)
NXP
17+
SOP-16
6200
100%原裝正品現(xiàn)貨
詢價(jià)
24+
5000
公司存貨
詢價(jià)
NXP/恩智浦
22+
NA
900
原裝正品
詢價(jià)
原廠正品
23+
SOP
50000
原裝正品,假一罰十
詢價(jià)