74HC4514PW-Q100中文資料安世數據手冊PDF規(guī)格書

1. General description

The 74HC4514-Q100 is a 4-to-16 line decoder/demultiplexer having four binary weighted address

inputs (A0 to A3), with latches, a latch enable input (LE), an enable input (E) and 16 outputs (Q0

to Q15). When LE is HIGH, the selected output is determined by the data on An. When LE goes

LOW, the last data present at An are stored in the latches and the outputs remain stable. When

E is LOW, the selected output, determined by the contents of the latch, is HIGH. At E HIGH, all

outputs are LOW. The enable input E does not affect the state of the latch. When the device is

used as a demultiplexer, E is the data input and A0 to A3 are the address inputs. Inputs include

clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in

excess of VCC.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

? Automotive product qualification in accordance with AEC-Q100 (Grade 1)

? Specified from -40 °C to +85 °C and from -40 °C to +125 °C

? Wide supply voltage range from 2.0 to 6.0 V

? CMOS low power dissipation

? High noise immunity

? CMOS input levels

? 16-line demultiplexing capability

? Decodes 4 binary-coded inputs into 16 mutually-exclusive outputs

? Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

? Complies with JEDEC standards

? JESD8C (2.7 V to 3.6 V)

? JESD7A (2.0 V to 6.0 V)

? ESD protection:

? HBM JESD22-A114F exceeds 2000 V

? MM JESD22-A115-A exceeds 200 V

3. Applications

? Digital multiplexing

? Address decoding

? Hexadecimal/BCD decoding