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74HC589中文資料摩托羅拉數(shù)據(jù)手冊(cè)PDF規(guī)格書

74HC589
廠商型號(hào)

74HC589

功能描述

8-Bit Serial or Parallel-Input/Serial-Output Shift Register with 3-State Output High-Performance Silicon-Gate CMOS

文件大小

266.72 Kbytes

頁面數(shù)量

10

生產(chǎn)廠商 Motorola, Inc
企業(yè)簡(jiǎn)稱

Motorola摩托羅拉

中文名稱

加爾文制造公司官網(wǎng)

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數(shù)據(jù)手冊(cè)

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更新時(shí)間

2025-3-4 14:30:00

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74HC589規(guī)格書詳情

8-Bit Serial or Parallel-Input/Serial-Output Shift Register with 3-State Output

High–Performance Silicon–Gate CMOS

The MC54/74HC589 is similar in function to the HC597, which is not a 3–state device. The device inputs are compatible with standard CMOS outputs, with pullup resistors, they are compatible with LSTTL outputs.

This device consists of an 8–bit storage latch which feeds parallel data to an 8–bit shift register. Data can also be loaded serially (see Function Table).

The shift register output, QH, is a three–state output, allowing this device to be used in bus–oriented systems.

The HC589 directly interfaces with the Motorola SPI serial data port on CMOS MPUs and MCUs.

? Output Drive Capability: 15 LSTTL Loads

? Outputs Directly Interface to CMOS, NMOS, and TTL

? Operating Voltage Range: 2 to 6 V

? Low Input Current: 1 μA

? High Noise Immunity Characteristic of CMOS Devices

? In Compliance with the Requirements Defined by JEDEC Standard No. 7A

? Chip Complexity: 526 FETs or 131.5 Equivalent Gates

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