74LCXZ16244GX中文資料仙童半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

General Description

The LCXZ16244 contains sixteen non-inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. When VCC is between 0 and 1.5V, the LCXZ12644 is in the high impedance state during power up or power down. This places the outputs in high impedance (Z) state preventing intermittent low impedance loading or glitching in bus oriented applications.

Features

■ 5V tolerant inputs and outputs

■ Guaranteed power up/down high impedance

■ Supports live insertion/withdrawal

■ 2.7V–3.6V VCC specifications provided

■ 4.5 ns tPD max (VCC = 3.0V), 20 μA ICC max

■ ±24 mA output drive (VCC = 3.0V)

■ Implements patented noise/EMI reduction circuitry

■ Latch-up performance exceeds 500 mA

■ ESD performance:

Human body model > 2000V

Machine model > 200V

■ Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) (Preliminary)