74LS138集成電路（IC）的門反相器規(guī)格書PDF中文資料

General Description

These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible.

Features

■ Designed specifically for high speed: Memory decoders Data transmission systems

■ DM74LS138 3-to-8-line decoders incorporates 3 enable inputs to simplify cascading and/or data reception

■ DM74LS139 contains two fully independent 2-to-4-line decoders/demultiplexers

■ Schottky clamped for high performance

■Typical propagation delay (3 levels of logic) DM74LS138 21 ns DM74LS139 21 ns

■ Typical power dissipation DM74LS138 32 mW DM74LS139 34 mW