74LV4066PW中文資料安世數(shù)據(jù)手冊(cè)PDF規(guī)格書

1. General description

The 74LV4066 is a quad single pole, single throw analog switch. Each switch features two

input/output terminals (nY and nZ) and an active HIGH enable input (nE). When nE is LOW, the

analog switch is turned off. Digital inputs include clamp diodes. This enables the use of current

limiting resistors to interface inputs to voltages in excess VCC.

2. Features and benefits

? Wide supply voltage range from 1.0 to 6.0 V

? CMOS low power dissipation

? Direct interface with TTL levels

? Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

? Complies with JEDEC standards:

? JESD8-7 (1.65 V to 1.95 V)

? JESD8-5 (2.3 V to 2.7 V)

? JESD8C (2.7 V to 3.6 V)

? JESD36 (4.5 V to 5.5 V)

? Typical VOLP (output ground bounce): < 0.8 V at VCC = 3.3 V and Tamb = 25 °C

? Very low ON-resistance:

? 60 Ω (typical) at VCC = 2.0 V

? 35 Ω (typical) at VCC = 3.0 V

? 25 Ω (typical) at VCC = 4.5 V

? ESD protection:

? HBM JESD22-A114F exceeds 2000 V

? MM JESD22-A115-A exceeds 200 V

? Specified from -40 °C to +80 °C and from -40 °C to +125 °C