74LV574PWDH中文資料飛利浦數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The 74LV574 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT574.

The 74LV574 is an octal D-type flip–flop featuring separate D-type inputs for each flip-flop and non-inverting 3-state outputs for bus oriented applications. A clock (CP) and an output enable (OE) input are common to all flip-flops.

The eight flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW-to-HIGH CP transition.

When OE is LOW, the contents of the eight flip-flops is available at the outputs. When OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops.

FEATURES

? Wide operating voltage: 1.0 to 5.5V

? Optimized for Low Voltage applications: 1.0 to 3.6V

? Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V

? Typical VOLP (output ground bounce) < 0.8V at VCC = 3.3V, Tamb = 25°C

? Typical VOHV (output VOH undershoot) > 2V at VCC = 3.3V, Tamb = 25°C

? Common 3-State output enable input

? Output capability: bus driver

? ICC category: MSI