74LVC16241A集成電路（IC）的緩沖器驅(qū)動器接收器收發(fā)器規(guī)格書PDF中文資料

1. General description

The 74LVC16241A is a 16-bit non-inverting buffer/line driver with 3-state outputs. The 3-state

outputs are controlled by the output enable inputs (1OE, 2OE, 3OE and 4OE). Schmitt trigger

action at all inputs makes the circuit highly tolerant of slower input rise and fall times. The device

can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to

the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications.

2. Features and benefits

? 5 V tolerant inputs and outputs for interfacing with 5 V logic

? Wide supply voltage range from 1.2 V to 3.6 V

? CMOS low power consumption

? MULTIBYTE flow-through standard pin-out architecture

? Low inductance multiple power and ground pins for minimum noise and ground bounce

? Direct interface with TTL levels

? High-impedance outputs when VCC = 0 V

? Complies with JEDEC standard:

? JESD8-7A (1.65 V to 1.95 V)

? JESD8-5A (2.3 V to 2.7 V)

? JESD8-C/JESD36 (2.7 V to 3.6 V)

? ESD protection:

? HBM JESD22-A114F exceeds 2000 V

? MM JESD22-A115B exceeds 200 V

? CDM JESD22-C101E exceeds 1000 V

? Specified from -40 °C to +85 °C and -40 °C to +125 °C.