74LVC1G06GM集成電路（IC）的緩沖器驅(qū)動器接收器收發(fā)器規(guī)格書PDF中文資料

1. General description

The 74LVC1G06 is a single inverter with open-drain output. Inputs can be driven from either 3.3 V

or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V

environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry

disables the output, preventing the potentially damaging backflow current through the device when

it is powered down.

2. Features and benefits

? Wide supply voltage range from 1.65 V to 5.5 V

? High noise immunity

? Complies with JEDEC standard:

? JESD8-7 (1.65 V to 1.95 V)

? JESD8-5 (2.3 V to 2.7 V)

? JESD8C (2.7 V to 3.6 V)

? JESD36 (4.5 V to 5.5 V)

? ±24 mA output drive (VCC = 3.0 V)

? CMOS low power dissipation

? Latch-up performance exceeds 250 mA

? Direct interface with TTL levels

? Overvoltage tolerant inputs to 5.5 V

? IOFF circuitry provides partial Power-down mode operation

? Multiple package options

? ESD protection:

? HBM JESD22-A114F exceeds 2000 V

? MM JESD22-A115-A exceeds 200 V

? Specified from -40 °C to +125 °C