74LVC1G08GV集成電路（IC）的門反相器規(guī)格書PDF中文資料

廠商型號	74LVC1G08GV
參數(shù)屬性	74LVC1G08GV 封裝/外殼為SC-74A，SOT-753；包裝為卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶；類別為集成電路（IC）的門反相器；產(chǎn)品描述：IC GATE AND 1CH 2-INP SC74A
功能描述	Single 2-input AND gate
絲印標識	V08
封裝外殼	SOT753 / SC-74A，SOT-753
文件大小	266.19 Kbytes
頁面數(shù)量	17 頁
生產(chǎn)廠商	Nexperia B.V. All rights reserved
企業(yè)簡稱	NEXPERIA【安世】
中文名稱	安世半導體(中國)有限公司官網(wǎng)
原廠標識
數(shù)據(jù)手冊	下載地址一下載地址二到原廠下載
更新時間	2025-2-3 23:00:00

1. General description

The 74LVC1G08 is a single 2-input AND gate. Inputs can be driven from either 3.3 V or 5 V

devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V

applications.

Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall time.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry

disables the output, preventing the damaging backflow current through the device when it is

powered down.

2. Features and benefits

? Wide supply voltage range from 1.65 V to 5.5 V

? High noise immunity

? ±24 mA output drive (VCC = 3.0 V)

? CMOS low power dissipation

? Direct interface with TTL levels

? Overvoltage tolerant inputs to 5.5 V

? IOFF circuitry provides partial Power-down mode operation

? Latch-up performance ≤ 250 mA

? Complies with JEDEC standard:

? JESD8-7 (1.65 V to 1.95 V)

? JESD8-5 (2.3 V to 2.7 V)

? JESD8C (2.7 V to 3.6 V)

? JESD36 (4.5 V to 5.5 V)

? ESD protection:

? HBM JESD22-A114F exceeds 2000 V

? MM JESD22-A115-A exceeds 200 V

? Multiple package options

? Specified from ?40 °C to +85 °C and ?40 °C to +125 °C