零件編號(hào) | 下載&訂購(gòu) | 功能描述 | 制造商&上傳企業(yè) | LOGO |
---|---|---|---|---|
74LVC1G74 | Single D-type flip-flop with set and reset; positive edge trigger 1.Generaldescription The74LVC1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D),clock (CP),set(SD)andreset(RD)inputs,andcomplementaryQandQoutputs.DataattheD-inputthat meetstheset-upandholdtimerequirementsontheLOW-to-HIGHclocktransi | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國(guó))有限公司 | NEXPERIA | |
74LVC1G74 | Single D-type flip-flop with set and reset; positive edge trigger DESCRIPTION The74LVC1G74isahigh-performance,low-voltage,Si-gateCMOSdevice,superiortomostadvancedCMOScompatibleTTLfamilies. The74LVC1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomp | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | |
74LVC1G74 | Single D-type flip-flop with set and reset; positive edge trigger Generaldescription The74LVC1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D) inputs,clock(CP)inputs,set(SD)andreset(RD)inputs,andcomplementaryQandQ outputs. Thisdeviceisfullyspecifiedforpartialpower-downapplicationsusingIOFF. | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | |
74LVC1G74 | Single D-type flip-flop with set and reset; positive edge trigger | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | |
74LVC1G74 | Single D-type flip-flop with set and reset; positive edge trigger | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | |
74LVC1G74 | Single D-type flip-flop with set and reset; positive edge trigger | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | |
74LVC1G74 | Single D-type flip-flop with set and reset; positive edge trigger | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | |
Single D-type flip-flop with set and reset; positive edge trigger 1.Generaldescription The74LVC1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D),clock (CP),set(SD)andreset(RD)inputs,andcomplementaryQandQoutputs.DataattheD-inputthat meetstheset-upandholdtimerequirementsontheLOW-to-HIGHclocktransi | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國(guó))有限公司 | NEXPERIA | ||
Single D-type flip-flop with set and reset; positive edge trigger DESCRIPTION The74LVC1G74isahigh-performance,low-voltage,Si-gateCMOSdevice,superiortomostadvancedCMOScompatibleTTLfamilies. The74LVC1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomp | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
Single D-type flip-flop with set and reset; positive edge trigger Generaldescription The74LVC1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D) inputs,clock(CP)inputs,set(SD)andreset(RD)inputs,andcomplementaryQandQ outputs. Thisdeviceisfullyspecifiedforpartialpower-downapplicationsusingIOFF. | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | ||
Single D-type flip-flop with set and reset; positive edge trigger DESCRIPTION The74LVC1G74isahigh-performance,low-voltage,Si-gateCMOSdevice,superiortomostadvancedCMOScompatibleTTLfamilies. The74LVC1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomp | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
Single D-type flip-flop with set and reset; positive edge trigger 1.Generaldescription The74LVC1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D),clock (CP),set(SD)andreset(RD)inputs,andcomplementaryQandQoutputs.DataattheD-inputthat meetstheset-upandholdtimerequirementsontheLOW-to-HIGHclocktransi | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國(guó))有限公司 | NEXPERIA | ||
Single D-type flip-flop with set and reset; positive edge trigger Generaldescription The74LVC1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D) inputs,clock(CP)inputs,set(SD)andreset(RD)inputs,andcomplementaryQandQ outputs. Thisdeviceisfullyspecifiedforpartialpower-downapplicationsusingIOFF. | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | ||
Single D-type flip-flop with set and reset; positive edge trigger 1.Generaldescription The74LVC1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D),clock (CP),set(SD)andreset(RD)inputs,andcomplementaryQandQoutputs.DataattheD-inputthat meetstheset-upandholdtimerequirementsontheLOW-to-HIGHclocktransi | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國(guó))有限公司 | NEXPERIA | ||
Single D-type flip-flop with set and reset; positive edge trigger Generaldescription The74LVC1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D) inputs,clock(CP)inputs,set(SD)andreset(RD)inputs,andcomplementaryQandQ outputs. Thisdeviceisfullyspecifiedforpartialpower-downapplicationsusingIOFF. | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | ||
Single D-type flip-flop with set and reset; positive edge trigger 1.Generaldescription The74LVC1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D),clock (CP),set(SD)andreset(RD)inputs,andcomplementaryQandQoutputs.DataattheD-inputthat meetstheset-upandholdtimerequirementsontheLOW-to-HIGHclocktransi | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國(guó))有限公司 | NEXPERIA | ||
Single D-type flip-flop with set and reset; positive edge trigger 1.Generaldescription The74LVC1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D),clock (CP),set(SD)andreset(RD)inputs,andcomplementaryQandQoutputs.DataattheD-inputthat meetstheset-upandholdtimerequirementsontheLOW-to-HIGHclocktransi | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國(guó))有限公司 | NEXPERIA | ||
Single D-type flip-flop with set and reset; positive edge trigger 1.Generaldescription The74LVC1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D),clock (CP),set(SD)andreset(RD)inputs,andcomplementaryQandQoutputs.DataattheD-inputthat meetstheset-upandholdtimerequirementsontheLOW-to-HIGHclocktransi | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國(guó))有限公司 | NEXPERIA | ||
Single D-type flip-flop with set and reset; positive edge trigger DESCRIPTION The74LVC1G74isahigh-performance,low-voltage,Si-gateCMOSdevice,superiortomostadvancedCMOScompatibleTTLfamilies. The74LVC1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomp | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
Single D-type flip-flop with set and reset; positive edge trigger Generaldescription The74LVC1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D) inputs,clock(CP)inputs,set(SD)andreset(RD)inputs,andcomplementaryQandQ outputs. Thisdeviceisfullyspecifiedforpartialpower-downapplicationsusingIOFF. | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp |
詳細(xì)參數(shù)
- 型號(hào):
74LVC1G74
- 制造商:
PHILIPS
- 制造商全稱(chēng):
NXP Semiconductors
- 功能描述:
Single D-type flip-flop with set and reset; positive edge trigger
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
NXP |
23+ |
TSSOP-8 |
3200 |
詢(xún)價(jià) | |||
NXP |
2020+ |
QFN |
4000 |
百分百原裝正品 真實(shí)公司現(xiàn)貨庫(kù)存 本公司只做原裝 可 |
詢(xún)價(jià) | ||
NXP |
2339+ |
N/A |
21322 |
公司原廠(chǎng)原裝現(xiàn)貨假一罰十!特價(jià)出售!強(qiáng)勢(shì)庫(kù)存! |
詢(xún)價(jià) | ||
進(jìn)口原裝 |
23+ |
進(jìn)口原裝 |
8881 |
全新原裝熱賣(mài)/假一罰十!更多數(shù)量可訂貨 |
詢(xún)價(jià) | ||
NXPSemiconductors |
24+ |
US88-VSSOP |
125 |
詢(xún)價(jià) | |||
NXP |
22+ |
SOT |
8200 |
全新進(jìn)口原裝現(xiàn)貨 |
詢(xún)價(jià) | ||
NXP |
23+ |
XQFN-8 |
8650 |
受權(quán)代理!全新原裝現(xiàn)貨特價(jià)熱賣(mài)! |
詢(xún)價(jià) | ||
TSSOP-8 |
23+ |
NA |
15659 |
振宏微專(zhuān)業(yè)只做正品,假一罰百! |
詢(xún)價(jià) | ||
23+ |
17ROHS |
2046 |
原裝正品--可開(kāi)增值稅發(fā)票量大可訂貨 |
詢(xún)價(jià) | |||
nxp |
21+ |
42664 |
12588 |
原裝正品假一罰十 |
詢(xún)價(jià) |
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