74LVC4245APW集成電路（IC）的轉(zhuǎn)換器電平移位器規(guī)格書PDF中文資料

1. General description

The 74LVC4245A is an octal dual supply translating transceiver featuring 3-state bus compatible

outputs in both send and receive directions. It is designed to interface between a 3 V and 5 V

bus in a mixed 3 V and 5 V supply environment. The device features an output enable input (OE)

and a send/receive input (DIR) for direction control. A HIGH on OE causes the outputs to assume

a high-impedance OFF-state, effectively isolating the buses. In suspend mode, when either

supply is zero, there is no current path between supplies. VCCA ≥ VCCB, except in suspend mode.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

2. Features and benefits

? 5 V tolerant inputs/outputs, for interfacing with 5 V logic

? Wide supply voltage range:

? 3 V bus (VCC(B)): 1.5 V to 3.6 V

? 5 V bus (VCC(A)): 1.5 V to 5.5 V

? CMOS low-power consumption

? TTL interface capability at 3.3 V

? Overvoltage tolerant control inputs to 5.5 V

? High-impedance when VCC(A) = 0 V

? Complies with JEDEC standard no. JESD8B/JESD36

? Latch-up performance meets requirements of JESD78 Class 1

? ESD protection:

? HBM JESD22-A114F exceeds 2000 V

? MM JESD22-A115-A exceeds 200 V

? Multiple package options

? Specified from -40 °C to +85 °C and -40 °C to +125 °C