74LVC86A集成電路（IC）的門(mén)反相器規(guī)格書(shū)PDF中文資料

74LVC86A屬于集成電路（IC）的門(mén)反相器。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的74LVC86A門(mén)和反相器邏輯柵極和逆變器系列中的產(chǎn)品對(duì)單個(gè)邏輯信號(hào)執(zhí)行基本邏輯運(yùn)算（例如 AND、NOT、OR 等）。與觸發(fā)器不同，它們不能夠存儲(chǔ)信息，不會(huì)對(duì)提供給其輸入的信號(hào)立即做出響應(yīng)。雖然早就被集成電路實(shí)施形式所取代，以用于實(shí)現(xiàn)復(fù)雜功能，但分立柵極仍可在僅需要非常簡(jiǎn)單邏輯功能的情況下使用。

DESCRIPTION

The 74LVC86A is a low voltage CMOS QUAD EXCLUSIVE OR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for 1.65 to 3.6 VCC operations and low power and low noise applications.

It can be interfaced to 5V signal environment for inputs in mixed 3.3/5V system. It has more speed performance at 3.3V than 5V AC/ACT family, combined with a lower powerconsumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ 5V TOLERANT INPUTS

■ HIGH SPEED: tPD = 4.2ns (MAX.) at VCC = 3V

■ POWER DOWN PROTECTION ON INPUTS AND OUTPUTS

■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V

■ PCI BUS LEVELS GUARANTEED AT 24 mA

■ BALANCED PROPAGATION DELAYS: tPLH ? tPHL

■ OPERATING VOLTAGE RANGE: VCC(OPR) = 1.65V to 3.6V (1.2V Data Retention)

■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 86

■ LATCH-UP PERFORMANCE EXCEEDS 500mA (JESD 17)

■ ESD PERFORMANCE:

HBM > 2000V (MIL STD 883 method 3015);

MM > 200V