74LVQ174M集成電路（IC）的觸發(fā)器規(guī)格書PDF中文資料

74LVQ174M屬于集成電路（IC）的觸發(fā)器。由意法半導體集團制造生產的74LVQ174M觸發(fā)器觸發(fā)器是能夠存儲單個邏輯狀態(tài)或信息“位”的基本數字存儲器件。這些器件至少有兩個輸入；一個或多個用于傳遞要存儲的數據，另一個用于指示存儲該數據的時間點。不同的觸發(fā)器類型，例如 D（延遲）、SR（置位復位）和 JK，對提供給其輸入的信號有不同的響應，可用于實現不同的邏輯功能。這些器件與鎖存器的不同之處在于它們是邊緣敏感器件，其保持的邏輯狀態(tài)僅在接收到有效時鐘信號時才會改變。

DESCRIPTION

The 74LVQ174 is a low voltage CMOS HEX D-TYPE FLIP FLOP WITH CLEAR NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications.

Information signals applied to D inputs are transferred to the Q outputs on the positive going edge of the CLK pulse.

When the CLR input is held low, the Q outputs are held low independently of the other inputs.

All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ HIGH SPEED:

fMAX = 150 MHz (TYP.) at VCC = 3.3 V

■ COMPATIBLE WITH TTL OUTPUTS

■ LOW POWER DISSIPATION:

ICC = 4 μA (MAX.) at TA=25°C

■ LOW NOISE:

VOLP = 0.3V (TYP.) at VCC = 3.3V

■ 75? TRANSMISSION LINE DRIVING CAPABILITY

■ SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 12mA (MIN) at VCC = 3.0 V

■ PCI BUS LEVELS GUARANTEED AT 24 mA

■ BALANCED PROPAGATION DELAYS: tPLH ? tPHL

■ OPERATING VOLTAGE RANGE:

VCC(OPR) = 2V to 3.6V (1.2V Data Retention)

■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 174

■ IMPROVED LATCH-UP IMMUNITY