74LVT126PWDH中文資料飛利浦數(shù)據手冊PDF規(guī)格書

General description

The LVT126 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.

This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT126 device is a quad buffer that is ideal for driving bus lines. The device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one of the 3-state outputs.

Features

■ Quad bus interface

■ 3-state buffers

■ Output capability: +64 mA and ?32 mA

■ TTL input and output switching levels

■ Input and output interface capability to systems at 5 V supply

■ Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs

■ Live insertion and extraction permitted

■ No bus current loading when output is tied to 5 V bus

■ Power-up 3-state

■ Latch-up protection:

◆ JESD78: exceeds 500 mA

■ ESD protection:

◆ MIL STD 883 method 3015: exceeds 2000 V

◆ Machine model: exceeds 200 V