74LVT573集成電路（IC）的鎖存器規(guī)格書PDF中文資料

General description

The 74LVT573 is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is an octal transparent latch coupled to eight 3-state output buffers. The two sections of the device are controlled independently by Latch Enable (LE) and Output Enable (OE) control gates. The 74LVT573 has a broadside pinout configuration to facilitate PC board layout and allow easy interface with microprocessors.

Features and benefits

■ Inputs and outputs arranged for easy interfacing to microprocessors

■ 3-state outputs for bus interfacing

■ Common output enable control

■ TTL input and output switching levels

■ Input and output interface capability to systems at 5 V supply

■ Bus hold data inputs eliminate need for

external pull-up resistors to hold unused inputs

■ Live insertion and extraction permitted

■ No bus current loading when output is tied to 5 V bus

■ Power-up reset

■ Power-up 3-state

■ Latch-up protection

◆ JESD78 class II exceeds 500 mA

■ ESD protection:

◆ HBM JESD22-A114E exceeds 2000 V

◆ MM JESD22-A115-A exceeds 200 V

■ Specified from -40°C to +85°C