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74V1G02C中文資料意法半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書

74V1G02C
廠商型號(hào)

74V1G02C

功能描述

SINGLE 2-INPUT NOR GATE

文件大小

49.11 Kbytes

頁(yè)面數(shù)量

7 頁(yè)

生產(chǎn)廠商 STMicroelectronics
企業(yè)簡(jiǎn)稱

STMICROELECTRONICS意法半導(dǎo)體

中文名稱

意法半導(dǎo)體集團(tuán)官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-26 23:00:00

74V1G02C規(guī)格書詳情

DESCRIPTION

The 74V1G02 is an advanced high-speed CMOS SINGLE 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output.

Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.

■ HIGH SPEED: tPD = 3.6ns (TYP.) at VCC = 5V

■ LOW POWER DISSIPATION: ICC = 1μA(MAX.) at TA=25°C

■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.)

■ POWER DOWN PROTECTION ON INPUTS

■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V

■ BALANCED PROPAGATION DELAYS: tPLH ? tPHL

■ OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V

■ IMPROVED LATCH-UP IMMUNITY

產(chǎn)品屬性

  • 型號(hào):

    74V1G02C

  • 制造商:

    STMICROELECTRONICS

  • 制造商全稱:

    STMicroelectronics

  • 功能描述:

    SINGLE 2-INPUT NOR GATE

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫(kù)存 備注 價(jià)格
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