74VHC00FT集成電路（IC）的門(mén)反相器規(guī)格書(shū)PDF中文資料

Functional Description

? Quad 2-Input NAND Gate

General

The 74VHC00FT is an advanced high speed CMOS 2-INPUT NAND GATE fabricated with silicon gate C2MOS

technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS

low power dissipation.

The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and

stable output.

An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply

voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.

This circuit prevents device destruction due to mismatched supply and input voltages.

Features

(1) AEC-Q100 (Rev. H) (Note 1)

(2) Wide operating temperature: Topr = -40 to 125 

(3) High speed: tpd = 3.7 ns (typ.) VCC = 5.0 V

(4) Low power dissipation: ICC = 2.0 μA (max) Ta = 25 

(5) High noise immunity: VNIH = VNIL = 28 VCC (min)

(6) Power-down protection is provided on all inputs.

(7) Balanced propagation delays: tPLH ≈ tPHL

(8) Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V

(9) Low noise: VOLP = 0.8 V (max)

(10) Pin and function compatible with the 74 series (AC/HC/AHC/LV etc.) 00 type.