74VHC126FT集成電路（IC）的緩沖器驅(qū)動器接收器收發(fā)器規(guī)格書PDF中文資料

Functional Description

? Quad Bus Buffer, Non-Inverted 3-State Outputs

74VHC125FT: Quad Bus Buffer

74VHC126FT: Quad Bus Buffer

General

The 74VHC125FT,74VHC126FT are high speed CMOS QUAD BUS BUFFERs fabricated with silicon gate

C2MOS technology.

They achieve the high speed operation similar to equivalent Bipolar Shottky TTL while maintaining the CMOS

low power dissipation.

The 74VHC125FT requires the 3-state control input G to be set high to place the output into the high impedance

state, whereas the 74VHC126FT requires the control input G to be set low to place the output into high impedance.

An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply

voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.

This circuit prevents device destruction due to mismatched supply and input voltages.

Features

(1) AEC-Q100 (Rev. H) (Note 1)

(2) Wide operating temperature: Topr = -40 to 125 

(3) High speed: Propagation delay time = 3.8 ns (typ.) at VCC = 5 V

(4) Low power dissipation: ICC = 4.0 μA (max) at Ta = 25 

(5) High noise immunity: VNIH = VNIL = 28 VCC (min)

(6) Power down protection is provided on all inputs.

(7) Balanced propagation delays: tPLH ≈ tPHL

(8) Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V

(9) Low noise: VOLP = 0.8 V (max)

(10) Pin and function compatible with 74 series (AC/HC/AHC/LV etc.) 125 or 126 type.