74VHC595FT集成電路（IC）的移位寄存器規(guī)格書PDF中文資料

Functional Description

? 8-Bit Shift Register/Latch (3-state)

General

The 74VHC595FT is an advanced high speed 8-BIT SHIFT REGISTER/LATCH fabricated with silicon gate

C2MOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS

low power dissipation.

The 74VHC595FT contains an 8-bit static shift register which feeds an 8-bit storage register.

Shift operation is accomplished on the positive going transition of the SCK input. The output register is loaded

with the contents of the shift register on the positive going transition of the RCK input.

Since RCK and SCK signal are independent, parallel outputs can be held stable during the shift operation. And,

since the parallel outputs are 3-state, it can be directly connected to 8-bit bus. This register can be used in serialto-

parallel conversion, data receivers, etc.

An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply

voltage. This device can be used to interface 5 V to 3 V systems and two supply systems

such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages.

Features

(1) AEC-Q100 (Rev. H) (Note 1)

(2) Wide operating temperature range: Topr = -40 to 125 

(3) High speed: fMAX = 185 MHz (typ.) at VCC = 5.0 V

(4) Low power dissipation: ICC = 4.0 μA (max) at Ta = 25

(5) High noise immunity: VNIH = VNIL = 28 VCC (min)

(6) Power-down protection is provided on all inputs.

(7) Balanced propagation delays: tPLH ≈ tPHL

(8) Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V

(9) Low noise: VOLP = 1.0 V (max)

(10) Pin and function compatible with the 74 series (74AC/HC/AHC/LV etc.) 595 type.